
r-virtual-03-64bit:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400698 <_init>:
  400698:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  40069c:	910003fd 	mov	x29, sp
  4006a0:	9400003e 	bl	400798 <call_weak_fn>
  4006a4:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4006a8:	d65f03c0 	ret

Disassembly of section .plt:

00000000004006b0 <.plt>:
  4006b0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4006b4:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf3b8>
  4006b8:	f947fe11 	ldr	x17, [x16, #4088]
  4006bc:	913fe210 	add	x16, x16, #0xff8
  4006c0:	d61f0220 	br	x17
  4006c4:	d503201f 	nop
  4006c8:	d503201f 	nop
  4006cc:	d503201f 	nop

00000000004006d0 <puts@plt>:
  4006d0:	b0000090 	adrp	x16, 411000 <puts@GLIBC_2.17>
  4006d4:	f9400211 	ldr	x17, [x16]
  4006d8:	91000210 	add	x16, x16, #0x0
  4006dc:	d61f0220 	br	x17

00000000004006e0 <__libc_start_main@plt>:
  4006e0:	b0000090 	adrp	x16, 411000 <puts@GLIBC_2.17>
  4006e4:	f9400611 	ldr	x17, [x16, #8]
  4006e8:	91002210 	add	x16, x16, #0x8
  4006ec:	d61f0220 	br	x17

00000000004006f0 <__cxa_atexit@plt>:
  4006f0:	b0000090 	adrp	x16, 411000 <puts@GLIBC_2.17>
  4006f4:	f9400a11 	ldr	x17, [x16, #16]
  4006f8:	91004210 	add	x16, x16, #0x10
  4006fc:	d61f0220 	br	x17

0000000000400700 <_ZNSt8ios_base4InitC1Ev@plt>:
  400700:	b0000090 	adrp	x16, 411000 <puts@GLIBC_2.17>
  400704:	f9400e11 	ldr	x17, [x16, #24]
  400708:	91006210 	add	x16, x16, #0x18
  40070c:	d61f0220 	br	x17

0000000000400710 <abort@plt>:
  400710:	b0000090 	adrp	x16, 411000 <puts@GLIBC_2.17>
  400714:	f9401211 	ldr	x17, [x16, #32]
  400718:	91008210 	add	x16, x16, #0x20
  40071c:	d61f0220 	br	x17

0000000000400720 <__gmon_start__@plt>:
  400720:	b0000090 	adrp	x16, 411000 <puts@GLIBC_2.17>
  400724:	f9401611 	ldr	x17, [x16, #40]
  400728:	9100a210 	add	x16, x16, #0x28
  40072c:	d61f0220 	br	x17

0000000000400730 <printf@plt>:
  400730:	b0000090 	adrp	x16, 411000 <puts@GLIBC_2.17>
  400734:	f9401a11 	ldr	x17, [x16, #48]
  400738:	9100c210 	add	x16, x16, #0x30
  40073c:	d61f0220 	br	x17

0000000000400740 <_ZNSt8ios_base4InitD1Ev@plt>:
  400740:	b0000090 	adrp	x16, 411000 <puts@GLIBC_2.17>
  400744:	f9401e11 	ldr	x17, [x16, #56]
  400748:	9100e210 	add	x16, x16, #0x38
  40074c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400750 <_start>:
  400750:	d280001d 	mov	x29, #0x0                   	// #0
  400754:	d280001e 	mov	x30, #0x0                   	// #0
  400758:	aa0003e5 	mov	x5, x0
  40075c:	f94003e1 	ldr	x1, [sp]
  400760:	910023e2 	add	x2, sp, #0x8
  400764:	910003e6 	mov	x6, sp
  400768:	580000c0 	ldr	x0, 400780 <_start+0x30>
  40076c:	580000e3 	ldr	x3, 400788 <_start+0x38>
  400770:	58000104 	ldr	x4, 400790 <_start+0x40>
  400774:	97ffffdb 	bl	4006e0 <__libc_start_main@plt>
  400778:	97ffffe6 	bl	400710 <abort@plt>
  40077c:	00000000 	.inst	0x00000000 ; undefined
  400780:	0040084c 	.word	0x0040084c
  400784:	00000000 	.word	0x00000000
  400788:	004009e0 	.word	0x004009e0
  40078c:	00000000 	.word	0x00000000
  400790:	00400a60 	.word	0x00400a60
  400794:	00000000 	.word	0x00000000

0000000000400798 <call_weak_fn>:
  400798:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf3b8>
  40079c:	f947f000 	ldr	x0, [x0, #4064]
  4007a0:	b4000040 	cbz	x0, 4007a8 <call_weak_fn+0x10>
  4007a4:	17ffffdf 	b	400720 <__gmon_start__@plt>
  4007a8:	d65f03c0 	ret
  4007ac:	00000000 	.inst	0x00000000 ; undefined

00000000004007b0 <deregister_tm_clones>:
  4007b0:	b0000080 	adrp	x0, 411000 <puts@GLIBC_2.17>
  4007b4:	91014000 	add	x0, x0, #0x50
  4007b8:	b0000081 	adrp	x1, 411000 <puts@GLIBC_2.17>
  4007bc:	91014021 	add	x1, x1, #0x50
  4007c0:	eb00003f 	cmp	x1, x0
  4007c4:	540000a0 	b.eq	4007d8 <deregister_tm_clones+0x28>  // b.none
  4007c8:	90000001 	adrp	x1, 400000 <_init-0x698>
  4007cc:	f9454021 	ldr	x1, [x1, #2688]
  4007d0:	b4000041 	cbz	x1, 4007d8 <deregister_tm_clones+0x28>
  4007d4:	d61f0020 	br	x1
  4007d8:	d65f03c0 	ret
  4007dc:	d503201f 	nop

00000000004007e0 <register_tm_clones>:
  4007e0:	b0000080 	adrp	x0, 411000 <puts@GLIBC_2.17>
  4007e4:	91014000 	add	x0, x0, #0x50
  4007e8:	b0000081 	adrp	x1, 411000 <puts@GLIBC_2.17>
  4007ec:	91014021 	add	x1, x1, #0x50
  4007f0:	cb000021 	sub	x1, x1, x0
  4007f4:	9343fc21 	asr	x1, x1, #3
  4007f8:	8b41fc21 	add	x1, x1, x1, lsr #63
  4007fc:	9341fc21 	asr	x1, x1, #1
  400800:	b40000a1 	cbz	x1, 400814 <register_tm_clones+0x34>
  400804:	90000002 	adrp	x2, 400000 <_init-0x698>
  400808:	f9454442 	ldr	x2, [x2, #2696]
  40080c:	b4000042 	cbz	x2, 400814 <register_tm_clones+0x34>
  400810:	d61f0040 	br	x2
  400814:	d65f03c0 	ret

0000000000400818 <__do_global_dtors_aux>:
  400818:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40081c:	910003fd 	mov	x29, sp
  400820:	f9000bf3 	str	x19, [sp, #16]
  400824:	b0000093 	adrp	x19, 411000 <puts@GLIBC_2.17>
  400828:	39414260 	ldrb	w0, [x19, #80]
  40082c:	35000080 	cbnz	w0, 40083c <__do_global_dtors_aux+0x24>
  400830:	97ffffe0 	bl	4007b0 <deregister_tm_clones>
  400834:	52800020 	mov	w0, #0x1                   	// #1
  400838:	39014260 	strb	w0, [x19, #80]
  40083c:	f9400bf3 	ldr	x19, [sp, #16]
  400840:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400844:	d65f03c0 	ret

0000000000400848 <frame_dummy>:
  400848:	17ffffe6 	b	4007e0 <register_tm_clones>

000000000040084c <main>:
  40084c:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400850:	910003fd 	mov	x29, sp
  400854:	b9001fa0 	str	w0, [x29, #28]
  400858:	f9000ba1 	str	x1, [x29, #16]
  40085c:	9100a3a0 	add	x0, x29, #0x28
  400860:	94000056 	bl	4009b8 <_ZN4BaseC1Ev>
  400864:	9100a3a0 	add	x0, x29, #0x28
  400868:	f9001fa0 	str	x0, [x29, #56]
  40086c:	90000000 	adrp	x0, 400000 <_init-0x698>
  400870:	912ae000 	add	x0, x0, #0xab8
  400874:	d2800081 	mov	x1, #0x4                   	// #4
  400878:	97ffffae 	bl	400730 <printf@plt>
  40087c:	90000000 	adrp	x0, 400000 <_init-0x698>
  400880:	912ae000 	add	x0, x0, #0xab8
  400884:	d2800081 	mov	x1, #0x4                   	// #4
  400888:	97ffffaa 	bl	400730 <printf@plt>
  40088c:	90000000 	adrp	x0, 400000 <_init-0x698>
  400890:	912ae000 	add	x0, x0, #0xab8
  400894:	d2800101 	mov	x1, #0x8                   	// #8
  400898:	97ffffa6 	bl	400730 <printf@plt>
  40089c:	90000000 	adrp	x0, 400000 <_init-0x698>
  4008a0:	912ae000 	add	x0, x0, #0xab8
  4008a4:	d2800101 	mov	x1, #0x8                   	// #8
  4008a8:	97ffffa2 	bl	400730 <printf@plt>
  4008ac:	90000000 	adrp	x0, 400000 <_init-0x698>
  4008b0:	912b2000 	add	x0, x0, #0xac8
  4008b4:	d2800201 	mov	x1, #0x10                  	// #16
  4008b8:	97ffff9e 	bl	400730 <printf@plt>
  4008bc:	f9401fa0 	ldr	x0, [x29, #56]
  4008c0:	f9400000 	ldr	x0, [x0]
  4008c4:	f9400001 	ldr	x1, [x0]
  4008c8:	f9401fa0 	ldr	x0, [x29, #56]
  4008cc:	d63f0020 	blr	x1
  4008d0:	f9401fa0 	ldr	x0, [x29, #56]
  4008d4:	f9400000 	ldr	x0, [x0]
  4008d8:	91002000 	add	x0, x0, #0x8
  4008dc:	f9400001 	ldr	x1, [x0]
  4008e0:	f9401fa0 	ldr	x0, [x29, #56]
  4008e4:	d63f0020 	blr	x1
  4008e8:	52800000 	mov	w0, #0x0                   	// #0
  4008ec:	a8c47bfd 	ldp	x29, x30, [sp], #64
  4008f0:	d65f03c0 	ret

00000000004008f4 <_Z41__static_initialization_and_destruction_0ii>:
  4008f4:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4008f8:	910003fd 	mov	x29, sp
  4008fc:	b9001fa0 	str	w0, [x29, #28]
  400900:	b9001ba1 	str	w1, [x29, #24]
  400904:	b9401fa0 	ldr	w0, [x29, #28]
  400908:	7100041f 	cmp	w0, #0x1
  40090c:	540001e1 	b.ne	400948 <_Z41__static_initialization_and_destruction_0ii+0x54>  // b.any
  400910:	b9401ba1 	ldr	w1, [x29, #24]
  400914:	529fffe0 	mov	w0, #0xffff                	// #65535
  400918:	6b00003f 	cmp	w1, w0
  40091c:	54000161 	b.ne	400948 <_Z41__static_initialization_and_destruction_0ii+0x54>  // b.any
  400920:	b0000080 	adrp	x0, 411000 <puts@GLIBC_2.17>
  400924:	91016000 	add	x0, x0, #0x58
  400928:	97ffff76 	bl	400700 <_ZNSt8ios_base4InitC1Ev@plt>
  40092c:	b0000080 	adrp	x0, 411000 <puts@GLIBC_2.17>
  400930:	91012002 	add	x2, x0, #0x48
  400934:	b0000080 	adrp	x0, 411000 <puts@GLIBC_2.17>
  400938:	91016001 	add	x1, x0, #0x58
  40093c:	90000000 	adrp	x0, 400000 <_init-0x698>
  400940:	911d0000 	add	x0, x0, #0x740
  400944:	97ffff6b 	bl	4006f0 <__cxa_atexit@plt>
  400948:	d503201f 	nop
  40094c:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400950:	d65f03c0 	ret

0000000000400954 <_GLOBAL__sub_I_main>:
  400954:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400958:	910003fd 	mov	x29, sp
  40095c:	529fffe1 	mov	w1, #0xffff                	// #65535
  400960:	52800020 	mov	w0, #0x1                   	// #1
  400964:	97ffffe4 	bl	4008f4 <_Z41__static_initialization_and_destruction_0ii>
  400968:	a8c17bfd 	ldp	x29, x30, [sp], #16
  40096c:	d65f03c0 	ret

0000000000400970 <_ZN4Base10function_1Ev>:
  400970:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400974:	910003fd 	mov	x29, sp
  400978:	f9000fa0 	str	x0, [x29, #24]
  40097c:	90000000 	adrp	x0, 400000 <_init-0x698>
  400980:	912a6000 	add	x0, x0, #0xa98
  400984:	97ffff53 	bl	4006d0 <puts@plt>
  400988:	d503201f 	nop
  40098c:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400990:	d65f03c0 	ret

0000000000400994 <_ZN4Base10function_2Ev>:
  400994:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400998:	910003fd 	mov	x29, sp
  40099c:	f9000fa0 	str	x0, [x29, #24]
  4009a0:	90000000 	adrp	x0, 400000 <_init-0x698>
  4009a4:	912aa000 	add	x0, x0, #0xaa8
  4009a8:	97ffff4a 	bl	4006d0 <puts@plt>
  4009ac:	d503201f 	nop
  4009b0:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4009b4:	d65f03c0 	ret

00000000004009b8 <_ZN4BaseC1Ev>:
  4009b8:	d10043ff 	sub	sp, sp, #0x10
  4009bc:	f90007e0 	str	x0, [sp, #8]
  4009c0:	90000000 	adrp	x0, 400000 <_init-0x698>
  4009c4:	912ba001 	add	x1, x0, #0xae8
  4009c8:	f94007e0 	ldr	x0, [sp, #8]
  4009cc:	f9000001 	str	x1, [x0]
  4009d0:	d503201f 	nop
  4009d4:	910043ff 	add	sp, sp, #0x10
  4009d8:	d65f03c0 	ret
  4009dc:	00000000 	.inst	0x00000000 ; undefined

00000000004009e0 <__libc_csu_init>:
  4009e0:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  4009e4:	910003fd 	mov	x29, sp
  4009e8:	a901d7f4 	stp	x20, x21, [sp, #24]
  4009ec:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf3b8>
  4009f0:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf3b8>
  4009f4:	91356294 	add	x20, x20, #0xd58
  4009f8:	913522b5 	add	x21, x21, #0xd48
  4009fc:	a902dff6 	stp	x22, x23, [sp, #40]
  400a00:	cb150294 	sub	x20, x20, x21
  400a04:	f9001ff8 	str	x24, [sp, #56]
  400a08:	2a0003f6 	mov	w22, w0
  400a0c:	aa0103f7 	mov	x23, x1
  400a10:	9343fe94 	asr	x20, x20, #3
  400a14:	aa0203f8 	mov	x24, x2
  400a18:	97ffff20 	bl	400698 <_init>
  400a1c:	b4000194 	cbz	x20, 400a4c <__libc_csu_init+0x6c>
  400a20:	f9000bb3 	str	x19, [x29, #16]
  400a24:	d2800013 	mov	x19, #0x0                   	// #0
  400a28:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400a2c:	aa1803e2 	mov	x2, x24
  400a30:	aa1703e1 	mov	x1, x23
  400a34:	2a1603e0 	mov	w0, w22
  400a38:	91000673 	add	x19, x19, #0x1
  400a3c:	d63f0060 	blr	x3
  400a40:	eb13029f 	cmp	x20, x19
  400a44:	54ffff21 	b.ne	400a28 <__libc_csu_init+0x48>  // b.any
  400a48:	f9400bb3 	ldr	x19, [x29, #16]
  400a4c:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400a50:	a942dff6 	ldp	x22, x23, [sp, #40]
  400a54:	f9401ff8 	ldr	x24, [sp, #56]
  400a58:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400a5c:	d65f03c0 	ret

0000000000400a60 <__libc_csu_fini>:
  400a60:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400a64 <_fini>:
  400a64:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400a68:	910003fd 	mov	x29, sp
  400a6c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400a70:	d65f03c0 	ret
